This session will provide a deeper dive into HPN configuration and performance, including sample cluster configurations, tools and capabilities to simplify deployment and tuning and typical tuning guidelines.

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Configuring and Tuning a High Performance Networking Fabric for Best Performance​

Todd Rimmer, Director of Software Architecture and Senior Principal Engineer, Intel Corporation

Todd Rimmer

James Erwin, Software Engineer, Intel Corporation

James Erwin headshot

This is not an introduction to DPC++/SYCL (read our book!) – it is a deeper look at the real in/outs involved in embracing SYCL for heterogenous computing, with key tips on how to dig in, be successful, and learn more. This is a must-not-miss look at DPC++ and SYCL for anyone considering it – technical yes, but accessible for anyone with a programming background.

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SYCL and DPC++

James Reinders, Engineer, Intel Corporation

AI technologies are playing an increasingly important role in traditional HPC modeling and simulation applications.  Equally, AI applications are getting large enough they require HPC technologies. This talk will describe our vision for the future and the technologies that we are jointly developing for Aurora, one of the world’s first exascale computers, in collaboration with Argonne National Laboratory, and describe how applications benefit from the capabilities we are developing.

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Converging AI, HPC, and Big Data Workflows

Dr. Robert W. Wisniewski, Chief Architect HPC, Aurora Technical Lead and PI, Intel Corporation

Venkatram Vishwanath, Data Sciences Team Lead at the Argonne Leadership Computing Facility (ALCF), Argonne National Laboratory

The ever increasing use of high-output scientific instruments urgently demands a cost-effective, simple, scalable, and efficient data collection solution.  This is especially true in the health care and life science (HCLS) industry. This talk presents a solution that combines the latest innovations from Intel, Zettar, AWS HCLS, and Supermicro to create a compact, highly scalable, HA, yet simple and cost-effective data collection solution.​ Also described: Intel innovations in Optane technology and DAOS, an open-source development by Intel. It leverages the unique capabilities of Intel PMEM and NVMe SSDs; Zettar's unified data mover has proven simplicity, scalability, and efficiency that has been spurred by its support of the ambitious data movement requirements of a premier DOE Exascale Computing preparation project, Linac Coherent Light Source II (LCLS-II); AWS HCLS - the most dominant in providing a highly productive cloud based environment for the various analysis pipelines for biomedical research; Supermicro’s flexible offerings of its flash-based storage servers.

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A Compact, Scalable, Efficient Data Collection Solution for Edge/IoT to Cloud​

Chin Fang, PhD, Founder & CEO, Zettar Inc.

Andrey Kudryavtsev, DAOS Product Management, Intel Corporation

In this session, Quanta Cloud Technology (QCT) introduces its experience of utilizing Distributed Asynchronous Object Storage (DAOS) system in QCT DevCloud. In addition, QCT compares the performance of DAOS and Lustre® filesystem on the 2nd Generation Intel® Xeon® Scalable Processor based platform, and a comparison the DAOS performance on the Intel 2nd and 3rd Generation Intel Xeon scalable processor based platforms. We show that DAOS outperforms Lustre over metadata and small file operations by orders of magnitude. Further DAOS performance doubles generation to generation when running on the Intel 3rd generation Intel Xeon Processor based scalable platform thanks to lower latency and higher bandwidth of Intel® Optane™ Persistent Memory 200 and increased bandwidth of Intel D7-P5510 series NVMEs with PCIe Gen4.

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DAOS Unleashes the Power in HPC Applications: QCT DevCloud Experience Sharing

Grover Hwang, Technical Manager and Solution Architect, Quanta Cloud Technology (QCT)

The widespread adoption of Heterogeneous Architectures in the context of High Performance Computing (HPC) brings many challenges and opportunities for power delivery and management. In this talk, we explore recent innovations co-designed across the Hardware and Software layers developed to help characterize workload behavior and to perform automated, nuanced optimizations of the underlying system for maximum performance and efficiency.​ This work empirically demonstrates job energy savings with negligible performance degradation on a variety of customer relevant workloads using a combination of Software and Hardware telemetry feeding adaptive heuristics which dynamically modulate power and frequency limits across the most power-hungry compute elements of the target systems (including CPUs and GPUs) using GEOPM, an open-source, runtime framework focused on facilitating the adoption and exploration of power management techniques and related hardware features. ​This work also demonstrates practical applications for HPC of the Intel® Speed Select Technology (SST) on 3rd Gen Intel® Xeon® Scalable processor to increase performance of workloads that expose some form of load imbalance, even when running at full TDP (Thermal Design Point). ​Finally, we discuss Software Architecture considerations of the GEOPM framework designed to facilitate the collaboration and integration with third party tools and the support of a variety of hardware platforms.

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Dynamic Power Management Techniques for Modern Heterogeneous HPC Systems

Federico Ardanaz, Power Architect and Principal Engineer, GEOPM, Intel Corporation

Acceleration of Performance using direct programming of GPUs. In this session, we will use Intel OneAPI profiling tools, Intel® VTune™ Profiler and Intel® Advisor, to identify performance bottlenecks and develop strategies to optimize applications at Argonne.

Acceleration of Performance using direct programming of GPUs. In this session, we will use Intel OneAPI profiling tools, Intel® VTune™ Profiler and Intel® Advisor, to identify performance bottlenecks and develop strategies to optimize applications at Argonne.​

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Workflow and Profiling for Heterogenous Compute

JaeHyuk Kwack, ALCF Performance Engingeering Group, Argonne National Laboratory

Kevin O’Leary, Technical Consulting Engineer, Intel Corporation

Michael D’Mello, Intel Application Engineer, Intel Corporation

This session demonstrates how FPGA development and integration with host software applications can be simplified by building bitstreams as shared libraries. In this case, this involves a C-standard library that aligns with the C programing language specification. The application features a C++ and Python program that offloads compute to the FPGA by invoking API’s and passing certain parameters. The design starts by compiling a oneAPI application written in Data Parallel C++ (DPC++) into a C-standard shared library. Then, it offloads the processing of a 1-D Fast Fourier Transform (FFT) algorithm to various Intel® FPGA platforms.

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Streamline FPGA Development with oneAPI Shared Libraries

Michael Spinali, Field Applications Engineer, Intel Corporation

Next Gen Intel® Xeon® Scalable Processor Code Named Sapphire Rapids Plus HBM is a revolutionary product for bandwidth-sensitive applications. It offers 64GB of high-bandwidth memory configurable in three modes: HBM-only, Flat, and Cache. HBM-only mode is for systems without DDR. Flat mode exposes HBM as a separate NUMA node allowing us to utilize standard Linux utilities to place an entire application in HBM. Cache mode exposes HBM as a direct-mapped memory-side cache that is transparent to software. This presentation looks at each mode in detail and describes best practices and tools to obtain the highest performance out of HBM.

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Enabling High-Bandwidth Memory in Future Intel Processors

Ruchira Sasanka, Senior HPC Application Engineer, Intel Corporation

Accurate and real-time pricing for a portfolio of derivatives can be generated locally or in the cloud using AI technology running on 3rd Generation Intel® Xeon® Scalable processors. This session focuses on successful use of Artificial Neural Network models (ANNs) by Quantifi on Intel Xeon Scalable processors to model and deliver real-time pricing with an accuracy considered equivalent to conventional approaches such as numerical integration and Monte Carlo methods.

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Accelerating Derivative Pricing Using AI on Intel Architecture

Sebastian Hahn, AI/ML Lead, Quantifi

Ansys Fluent (Computational Fluid Dynamics) is one of the most widely used CAE applications in the industry. In this presentation we will cover optimizing Fluent for Intel architecture employing Intel® oneAPI Math Kernel Library (oneMKL) Sparse BLAS kernels. Intel® oneMKL provides substitutions for two of the smoothers most commonly used in Fluent AMG solver. Newly developed oneMKL functionality is based on two steps: an inspection step to analyze different matrix properties, such as sparsity pattern, to facilitate more efficient storage, and execute step that leverages AVX-512 instructions. The work was organized in a way to ease the transition from POC to final product and customer visibility.

Ansys Fluent (Computational Fluid Dynamics) is one of the most widely used CAE applications in the industry. In this presentation we will cover optimizing Fluent for Intel architecture employing Intel® oneAPI Math Kernel Library (oneMKL) Sparse BLAS kernels. Intel® oneMKL provides substitutions for two of the smoothers most commonly used in Fluent AMG solver. Newly developed oneMKL functionality is based on two steps: an inspection step to analyze different matrix properties, such as sparsity pattern, to facilitate more efficient storage, and execute step that leverages AVX-512 instructions. The work was organized in a way to ease the transition from POC to final product and customer visibility.​

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Optimizing Fluent for Intel Instruction Set Architecture

Maria Zhukova, Software Application Engineer, Intel Corporation

Robert Larson, Software Application Engineer, Intel Corporation

The 2017 Nobel prize in Chemistry was awarded to scientists pioneering Cryogenic Electron Microscopy (Cryo-EM) techniques for hi-res structure determination of biomolecules. Pharma companies have gone big in leveraging Cryo-EM for drug discovery. RELION is a top open-source application in this domain of molecular imaging. This session discusses Intel’s transformational optimizations leveraging AVX-512 and improvements to cluster scaling.

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Cryo-EM Optimized for Intel Architecture (AVX-512 and Cluster Scalability)

Charles Congdon, Software Enabling and Optimization Engineer, Intel Corporation

GROMACS is an open-source, high-performance molecular-dynamics package, already leveraging SIMD CPU, multiprocessing, and GPU acceleration via CUDA and OpenCL. A year ago, we began porting GROMACS to SYCL to achieve better performance portability and improve code maintainability. In this talk, we discuss the lessons learned and the main take-aways from this endeavor.

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Adding SYCL Support to GROMACS Molecular Dynamics Package​

Andrey Alekseenko, KTH Royal Institute of Technology

Researchers need more computing power to answer their most pressing questions, but they are often limited by their on-premise computing resources and the steep learning curve of cloud computing. RONIN is an orchestration engine built on AWS that enables researchers to harness the power of the latest Intel technologies without any prior experience in the cloud. With RONIN, researchers can easily deploy and package the latest Intel processors and Intel tools to optimise and scale their analysis workflows in minutes.

Dev Hub

Configuring and Tuning a High Performance Networking Fabric for Best Performance

Abstract

Speakers

Todd Rimmer, Director of Software Architecture and Senior Principal Engineer, Intel Corporation

James Erwin, Software Engineer, Intel Corporation

Dev Hub

Configuring and Tuning a High Performance Networking Fabric for Best Performance​

Abstract

Speakers

Todd Rimmer, Director of Software Architecture and Senior Principal Engineer, Intel Corporation

James Erwin, Software Engineer, Intel Corporation

Configuring and Tuning a High Performance Networking Fabric for Best Performance